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Lead EM and IR-drop simulations ensuring robust power delivery and signal integrity for high-performance ICs. Collaborate with teams on power grid strategies and support EMIR sign-off across chip hierarchy.

As a CPU Microarchitecture/RTL Engineer, you will design high-performance CPUs, focusing on RTL design and microarchitecture collaboration with cross-functional teams.

The Timing Engineer will perform static timing analysis, optimizing paths and constraints to ensure chip performance while collaborating with various engineering teams.

The Staff DevOps Engineer will optimize infrastructure for chip development, build CI/CD pipelines, and enhance workflows using AI/ML practices.

The CPU Workload Performance Analysis Engineer will conduct workload characterization and performance simulation to optimize CPU products, collaborating with architects and designers.

Lead the physical design of high-performance CPUs and AI/ML chips, managing backend execution from RTL handoff to tapeout, while collaborating with various teams to optimize power, performance, and area.

As a Customer Experience Manager, you'll lead CX initiatives, advocate for customers, resolve pain points, and track CX metrics to enhance customer interactions and success.

The Sr. Data Engineer will build reliable data pipelines, shape data architecture, and facilitate data-driven decision-making across teams.