Top Tech Jobs & Startup Jobs in Denver & Boulder, CO

Lead constrained-random verification of high-throughput Ethernet ASICs for AI/ML acceleration using SystemVerilog/UVM testbenches, drive coverage closure, run simulations with VCS/Incisive, script automation, collaborate with global design and architecture teams, and provide technical leadership.

Design and execute verification plans for IP blocks and systems using SystemVerilog/UVM. Build testbenches, develop Python behavioral models, analyze simulations, debug failures, maintain automation/regression frameworks, and collaborate with design and architecture teams to improve verification methodologies and resolve root causes.

The Fab Manufacturing Quality Engineer will enhance quality systems in semiconductor manufacturing, lead meetings, and develop data mining tools while managing quality processes and improvement initiatives across teams.

Identify, analyze, and minimize defectivity in FBAR filter fabrication using inline inspection and physical analysis (SEM/TEM/AFM/FIB). Lead root-cause investigations, define visual control plans, author OCAPs, drive containment and disposition actions, and partner across fab, PAL, and backend teams to improve yield and reliability. Mentor staff and lead cross-functional task forces to resolve complex defect trends.

Develop and execute verification plans and environments for complex digital and mixed-signal IP. Create UVM testbenches, random and directed tests, assertions, functional models; perform coverage closure, debug RTL and gate-level failures, and collaborate with design teams and EDA vendors. May work with emulation and FPGA prototyping and adopt advanced verification flows.

Provide phone, email, and web technical support for Brocade/Broadcom OEMs and customers. Troubleshoot SAN and networking issues, analyze protocol traces, document service requests, replicate problems in lab, define resolution plans, and collaborate with global teams to close incidents and improve support processes.

The Principal IC Design Engineer will design DRAM interface logic, lead simulation and verification efforts, collaborate with teams, and ensure quality designs in SOC architecture.

Design and develop system-level test PCBs for Broadcom ICs: perform schematic capture with Allegro, create and manage PCB libraries, collaborate with firmware, layout, SI, mechanical teams, oversee fabrication and assembly vendors, test and debug manufactured PCBs, manage inventory and ECOs, and ensure manufacturability, thermal and PDN considerations.

Senior mainframe infrastructure consultant providing architecture, implementation, upgrades, troubleshooting, demos/POCs, and technical leadership for Broadcom mainframe products. Requires coding/scripting (REXX/COBOL/HLASM), deep z/OS expertise, customer engagement, and travel to client sites.

Lead engineering teams to build an AI-first ValueOps Financial Intelligence SaaS platform combining Hybrid Cloud FinOps, SPM, engineering analytics, and DevOps. Define roadmaps, deliver AI-powered cost optimization, forecasting, budgeting, and executive insights, partner with product/AI/platform teams, modernize CI/CD and DevSecOps, and drive global team hiring, mentoring, and cross-functional execution.