Top Tech Jobs & Startup Jobs in Denver & Boulder, CO

Develop and integrate SoC architectures and embedded IP for AI and storage chips. Responsibilities include design analysis, simulation, synthesis, formal verification, validation, timing and physical implementation optimization, and release documentation. The role coordinates internal and external teams, collaborates with layout and DFT engineers, and makes data-driven architectural trade-offs involving processors, AMBA interconnects, IO, DRAM, and high-speed SERDES.

Owns and supports PVD equipment in an 8-inch semiconductor wafer fabrication facility. Responsibilities include equipment troubleshooting, optimization, upgrades, conversions, preventative and predictive maintenance, qualification, personnel training, and performance monitoring. The role collaborates with process engineering and R&D to develop robust equipment and processes, apply statistical validation, and execute improvement projects supporting high-volume manufacturing.

Performs end-to-end physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL engineers and develops physical design flows using TCL/Perl scripting and EDA tools. The role is fully onsite and supports PCIe switch and enterprise storage products.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL engineers and requires expertise in EDA tools, TCL/Perl scripting, top-level static timing analysis, and in-person execution in Colorado Springs.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, micro-architecture development, Verilog/SystemVerilog implementation, clock-domain crossing, low-power design, timing closure, RTL debugging, third-party IP integration, cross-functional collaboration, and silicon validation support. The role is fully onsite and requires extensive industry experience in digital IC design.

Performs end-to-end physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL design engineers and works onsite. Requires TCL/Perl scripting, EDA tool proficiency, a bachelor’s degree in electrical or electronics engineering, and 12+ years of relevant experience.

Execute the full physical design cycle from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborate with RTL design engineers and develop scripting-based flows. The role requires in-person work, a bachelor's degree in electrical or electronics engineering, and 12+ years of relevant experience.

Lead project management for 20+ concurrent ASIC package design projects involving complex flip-chip BGA packages, high-speed SerDes, HBM, DDR5, and high-power delivery. Create schedules, coordinate global engineering teams, customers, vendors, and cross-functional partners, track risks, improve methodologies, and communicate project status. Contribute to package design rules, technical methodologies, design-for-X tradeoffs, SI/PI, thermal and mechanical modeling, automation, and new business quotes.

Provides senior-level technical consulting for mainframe infrastructure environments and Broadcom Software products. Responsibilities include solution architecture, product implementation and upgrades, integrations, demonstrations, proofs of concept, troubleshooting, technical documentation, customer presentations, and post-implementation support. The consultant advises clients and management on infrastructure strategies and works with account teams to design solutions. Requires expertise in z/OS, Broadcom mainframe tools, REXX or HLASM, and major mainframe subsystems and security managers. Client-site travel is required.

Develop, test, maintain, and optimize firmware and software for high-speed serial communication and data conversion IPs. Refactor legacy systems, build regression tests, support Jenkins CI/CD pipelines, administer Linux compute clusters, and debug hardware-software interactions using lab equipment and RTL simulations. The role also involves field issue resolution, documentation, cross-functional collaboration, and mentoring.