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The Design Engineer will focus on chip-level physical architecture and integration for ASICs, optimizing die layout and collaborating with cross-functional teams to ensure successful designs meet performance targets.

The IP Integration Engineer will develop die-to-die and die-to-memory PHY IP, collaborating with cross-functional teams to optimize ASIC designs and tackle technical challenges.

Seeking a Product Marketing Manager to define product narrative, develop go-to-market strategies, create technical content, and coordinate with sales teams for our Network Observability solution.

The Product Marketing Manager will lead global go-to-market strategies for Workload Automation, create compelling content, and drive customer success through collaboration with product and sales teams.

The Floorplanning Engineer will define and optimize top-level floorplan architecture, manage power grid design, and ensure tapeout readiness for advanced ASICs.

The Design Automation DFT Engineer will develop and support design automation software tools for ASIC development while collaborating with IC designers and EDA vendors to resolve issues.

The Failure Analysis Engineer diagnoses complex failures in advanced silicon and packaging technologies, collaborating with teams to drive root-cause analysis and maintain high quality standards.

The Reliability Engineer will review hardware designs, manage project schedules, and ensure compliance with reliability qualifications for Broadcom's products.

The PHY Characterization Engineer tests and characterizes die-to-die PHY IP for ASIC products, collaborating with cross-functional teams and developing automation scripts.

The Design Implementation Engineer will manage design implementation for ASIC/SoC, focusing on timing closure, physical verification, and adopting Broadcom's design methodologies. Expected to utilize tools for timing analysis, power optimization, and equivalent checks.