The Fullchip Floorplan Design Engineer will be responsible for SoC floorplanning, IP placement, and ensuring optimal physical dimensions for silicon products. They will collaborate with different stakeholders, use industry-standard tools, and drive methodologies for effective design execution.

The Software Engineer will develop transactor/BFM software stacks for emulation platforms, assist in validation content generation, and collaborate on next-gen Xeon and Custom SoC architectures.

As a SoC Design Verification Engineer, ensure the functional integrity of Intel's SoC designs through verification planning, test execution, and collaboration with cross-functional teams to drive innovation and quality improvements.