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Accelerator Memory Subsystem Performance Modeling and Correlation

Reposted 2 Days AgoSaved
Hybrid
2 Locations
Mid level
Mid level
Software
As an Accelerator Performance Architect, you'll define and model memory subsystem architectures, develop performance models, and analyze workloads in a team environment.
Top Skills: CC++PythonSystem-Verilog
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Rivos

SoC Performance Modeling

Reposted 3 Days AgoSaved
Hybrid
2 Locations
Entry level
Entry level
Software
As a SoC Performance Modeling Engineer, you will design and implement performance models, validate them, analyze performance studies, and enhance modeling infrastructure.
Top Skills: C/C++PythonSystemverilog
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Rivos

Accelerator Power Management and Debug Microarchitecture & Logic Design Lead

Reposted 5 Days AgoSaved
Hybrid
2 Locations
Senior level
Senior level
Software
Lead the microarchitecture design for power management and debugging features, ensuring integration with various teams to meet design requirements.
Top Skills: PythonSystemverilog
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Rivos

DDR Memory Controller Verification

Reposted 6 Days AgoSaved
Hybrid
2 Locations
Mid level
Mid level
Software
As a Memory Controller Verification Engineer, you'll verify DDR and HBM memory subsystems, develop test plans, and collaborate with design teams and vendors.
Top Skills: Systemverilog,Uvm
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Rivos

Physical Design - Intern

Reposted 10 Days AgoSaved
In-Office
2 Locations
Internship
Internship
Software
Intern will be responsible for physical design from RTL to GDSII, collaborating with teams for design validation and optimization.
Top Skills: PerlPythonSystemverilog,Cad ToolsTclUnixVerilog
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Rivos

Cache Microarchitecture & Logic Design

Reposted 10 Days AgoSaved
Hybrid
2 Locations
Junior
Junior
Software
The role involves developing cache microarchitectures, refining RTL designs, validating performance, and collaborating with multi-functional teams for design implementations.
Top Skills: CC++Systemverilog
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Rivos

Silicon Formal Verification - Intern

Reposted 10 Days AgoSaved
In-Office
2 Locations
Internship
Internship
Software
As a Formal Verification Intern, you will analyze CPU architecture and microarchitecture, proving properties and developing models using formal methods.
Top Skills: Formal VerificationModel CheckingRisc-VTheorem Provers
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Rivos

Accelerator Verification Intern

Reposted 10 Days AgoSaved
Hybrid
2 Locations
Internship
Internship
Software
Intern position focused on architecture, design, and verification of Risc-V based computing platforms. Hands-on experience with complex chips in a creative environment.
Top Skills: C/C++PythonVerilog
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Rivos

CPU Design/Verification - Intern

Reposted 10 Days AgoSaved
In-Office
2 Locations
Internship
Internship
Software
This internship focuses on CPU RTL design and verification, including microarchitecture development, test bench creation, and validation within a multi-functional team environment.
Top Skills: CC++PerlPythonRtl DesignSystemverilog
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Rivos

Silicon Microarchitecture & Logic Design - Intern

Reposted 10 Days AgoSaved
In-Office
2 Locations
Internship
Internship
Software
Assist in CPU and SOC microarchitecture design and development, focusing on validation, performance exploration, and design delivery with a multi-functional team.
Top Skills: CC++PerlPythonSystemverilog
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