Top Remote Senior Level Hardware Engineer Jobs in CO

Perform jurisdictional inspections of boilers and pressure vessels, conduct internal boiler examinations, manage a multistate territory, communicate findings to client management, and perform machinery breakdown risk assessments.

As an ASIC Design Verification Engineer, you will develop and execute verification strategies for AI inference ASICs, ensuring functional correctness and performance, while collaborating with design and architecture teams.

Responsible for semiconductor technology component engineering for CommIC products, managing design-in, testing, manufacturing, and quality, while interfacing with suppliers and internal teams to resolve issues.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Lead and validate high-performance out-of-order RISC-V CPU designs, manage a team of verification engineers, and collaborate with architects.

The Sr. Hardware Design Engineer leads ASIC and FPGA projects, defining architecture, guiding RTL development, and mentoring junior engineers to deliver high-quality silicon solutions.

The Senior Hardware Engineer will design, prototype, and validate multi-radio PCBs for consumer devices, ensuring robustness and scalability. Responsibilities include circuit design, schematics, validation, and collaboration with cross-disciplinary teams.

The Lead RTL/FPGA Design Engineer will develop and manage high-performance coherent modems for free space optical communications, translating DSP algorithms into synthesizable RTL, ensuring compliance, and supporting integration and testing.

As a Senior Mechanical Engineer, you'll design HVAC, ventilation, and vertical transport systems for transit projects, perform engineering calculations, and collaborate with multidisciplinary teams.

Seeking a Senior Physical Design Engineer with expertise in chip-level implementation, EDA tools, and low-power design to enhance AI hardware capabilities.