Top Remote Senior Level Hardware Engineer Jobs in CO

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Design and develop silicon photonics integrated circuits, driving architecture, product definition, and optimizing performance for optical systems while leading cross-functional collaboration.

The PIC Architect is responsible for designing advanced silicon photonics integrated circuits, managing PIC development, and coordinating with cross-functional teams to optimize performance and manufacturing processes.

Remote 12-month contract RTL Design Engineer to own micro-architecture and RTL implementation for complex digital blocks. Requires SystemVerilog/Verilog expertise, memory controller and SoC integration experience, IP integration, multi-clock-domain design, and sign-off familiarity (CDC/RDC/lint/synthesis). Works independently and collaborates with DV for closure and debug.

Lead end-to-end development and launch of multiple hardware/firmware/software integrated product programs. Manage scope, schedules, budgets, and cross-functional global teams, drive commercialization and design transfer to manufacturing, mitigate risks, report status to leadership, ensure compliance with product development processes, and collaborate with supply chain, manufacturing, and customers.

Design and develop emulator-based chip-level validation and automated test infrastructure for HPE Slingshot NIC and switch ASICs. Author software-driven test content, debug hardware/software interactions, identify coverage gaps, support bring-up of new ASIC revisions, and collaborate with architecture, design, firmware, and software teams to validate functionality, performance, and reliability across product generations.

The Lead RTL/FPGA Design Engineer will develop and manage high-performance coherent modems for free space optical communications, translating DSP algorithms into synthesizable RTL, ensuring compliance, and supporting integration and testing.

Seeking a Senior Physical Design Engineer with expertise in chip-level implementation, EDA tools, and low-power design to enhance AI hardware capabilities.

Lead build, integration, and optimization of full-chip and system-level ASIC emulation platforms. Enable HW/SW co‑development, debug emulation failures, automate compile/regression flows, support silicon bring-up, and collaborate with RTL, DV, firmware, physical design, and validation teams to accelerate verification and system validation.

The Hydro Mechanical Engineer designs and commissions hydro turbines, performs mechanical calculations, oversees FEA and CFD analysis, and coordinates with various engineers. Responsibilities include technical reviews, vendor assessments, site inspections, and compliance with industry standards.

Lead the Mechanical Engineering Department, manage design teams, oversee project stages, ensure compliance, and participate in technical reviews and proposals.