Top Remote Senior Level Hardware Engineer Jobs in CO

Design and deliver secure compute hardware for post-quantum cryptography and orbital/terrestrial systems. Own power, thermal, enclosure, and bus architecture design; collaborate with software, security, and systems teams; support FPGA integration, manufacturability, reliability, and environment-specific constraints (radiation, vibration, thermal-vacuum). Deliver iterative hardware releases on aggressive timelines.

The Lead Mechanical Engineer will manage tooling design for hydropower projects, ensuring compliance with safety and engineering standards, coordinating with various teams and performing technical calculations.

Lead the design and architecture of DWDM communication systems, working with hardware and software teams to create new optical platforms.

Responsible for evaluating and ordering manufacturing equipment, overseeing installation and maintenance, providing technical support, and writing maintenance schedules.

Seeking an experienced DFT Verification Engineer to ensure ASIC DFT logic correctness, building robust verification environments, and collaborating with design engineers on high-quality silicon delivery.

As an ASIC Design Verification Engineer, you will develop and execute verification strategies for AI inference ASICs, ensuring functional correctness and performance, while collaborating with design and architecture teams.

The Senior Formal Verification Engineer will verify sophisticated ASIC builds using formal methods, collaborate with architecture teams, develop verification environments, and support silicon debug.

Lead PCB/FPC design for consumer electronics: component placement, routing, signal and power integrity analysis, DFM, and producing fabrication/assembly packages. Manage vendors, release designs into PLM, author ECOs, and maintain ECAD libraries.

The Staff Process Integration Engineer will lead process development for superconducting IC fabrication, optimize production processes, and enhance reliability in collaboration with foundries.

Owner of micro-architecture and RTL lifecycle for complex digital blocks. Implement RTL in SystemVerilog/Verilog, drive control logic and IP integration, support sign-off (CDC, RDC, lint, synthesis), collaborate with DV teams for closure and debug, and take full project ownership with minimal supervision.