Top Remote Senior Level Hardware Engineer Jobs in CO

Develop FPGA prototypes and hardware platforms for ASIC integration, firmware development, and system validation. Support first-silicon bring-up, debugging, interface validation, and automated regression infrastructure. Configure and validate Ethernet SerDes, SPI, UART, GPIO, and other interfaces while debugging across RTL, firmware, software, FPGA prototypes, and silicon. Collaborate with ASIC design, verification, firmware, software, systems, and DFT teams throughout the silicon lifecycle.

Design and lead advanced ASIC package architectures for FC-BGA and MCM solutions, covering substrate stack-ups, ball maps, signal and power integrity, thermal management, reliability, and manufacturability. Partner with silicon, RF, and systems teams to optimize package interfaces and support high-speed, power-dense ASICs from architecture through production. Manage packaging vendors, substrate suppliers, and OSATs while establishing design standards and qualification methodologies.

The role involves optimizing hardware support within a software stack for AI model deployment, collaborating with teams and hardware vendors to enhance performance and portability across platforms.

Bring up, validate, port, and optimize support for new accelerator architectures across kernels, compilers, runtimes, graph execution, and model serving. Investigate cross-layer correctness and performance issues, develop hardware and ISA expertise, map AI operators to novel platforms, build portability infrastructure, benchmark workloads, and collaborate with hardware vendors to deliver production-quality integrations.

Design and evaluate rigorous hardware engineering problems for AI training projects. Develop reference solutions using calculations, simulations, Python scripts, and experimental reasoning. Model and validate hardware systems against physical test data, create verification methodologies, investigate failures, and document reproducible technical solutions. The role requires substantial hardware engineering ownership, strong programming ability, quantitative reasoning, and mandatory hands-on experience with AI Coding Agents.

Develops high-speed analog ICs exceeding 100 Gbaud for next-generation optical networking products. Responsibilities span product definition, circuit design, layout, verification, silicon bring-up, DVT, qualification, characterization, testing, and production ramp-up. The engineer collaborates with verification, CAD, product, test, operations, and reliability teams while supporting system-level customers. Required expertise includes SiGe BiCMOS or CMOS design, high-frequency passive structures, device physics, RF wafer probing, laboratory equipment, and high-speed analog IC evaluation.

Integrates first-party and third-party IPs into subsystems and SoCs using Verilog and SystemVerilog. Performs synthesis, timing constraint development, floor-planning analysis, performance optimization, register integration, CDC, lint, RDC, quality checks, and physical-design handoff. Works independently on complex integration problems, improves processes, supports junior staff, and communicates progress and status to customers regularly.

Perform transistor-level layout for RF, mixed-signal, and analog RFID IC blocks. Collaborate with analog and digital designers on floorplanning, pin placement, power distribution, routing, matching, electromigration, and signal coupling. Conduct layout reviews, resolve DRC/LVS/ERC issues, support advanced semiconductor process nodes, and coordinate layout schedules and floorplan activities.

The Senior Formal Verification Engineer will verify sophisticated ASIC builds using formal methods, collaborate with architecture teams, develop verification environments, and support silicon debug.

The PCB Layout Engineer will design complex printed circuit board layouts for drones, ensuring high performance, manufacturability, and reliability while collaborating with other engineering teams.

Designs complex RF printed circuit board layouts and schematics using Altium Designer. Creates component libraries, footprints, and 3D models; evaluates design feasibility, manufacturability, testing, cost, packaging, impedance control, and signal integrity. Coordinates with engineering, manufacturing, quality, test teams, and fabrication vendors throughout design release and production. Applies IPC standards, resolves fabrication issues, establishes design standards, and contributes to PCB design trade-offs and specifications.

Design and implement FPGA code for satellite digital payloads, including DSP algorithms, software-defined radio signal processing, embedded systems, and processor or peripheral interfaces. Responsibilities include developing custom IP, improving DSP and interface reliability, integrating vendor IP cores, supporting communications architecture, and participating in spacecraft design studies. The engineer will work across simulation, synthesis, place and route, timing closure, and hardware testing.