Top Remote Senior Level Hardware Engineer Jobs in CO

Responsible for evaluating and ordering manufacturing equipment, overseeing installation and maintenance, providing technical support, and writing maintenance schedules.

Seeking an experienced DFT Verification Engineer to ensure ASIC DFT logic correctness, building robust verification environments, and collaborating with design engineers on high-quality silicon delivery.

As an ASIC Design Verification Engineer, you will develop and execute verification strategies for AI inference ASICs, ensuring functional correctness and performance, while collaborating with design and architecture teams.

Provide 24/7 advanced technical support for optical products, troubleshoot complex system-level issues, escalate and liaise with R&D to drive resolutions, document support activities, train junior staff, and collaborate cross-functionally to improve processes and customer satisfaction. Periodic on-call duties required.

The Senior Formal Verification Engineer will verify sophisticated ASIC builds using formal methods, collaborate with architecture teams, develop verification environments, and support silicon debug.

Lead PCB/FPC design for consumer electronics: component placement, routing, signal and power integrity analysis, DFM, and producing fabrication/assembly packages. Manage vendors, release designs into PLM, author ECOs, and maintain ECAD libraries.

The Staff Process Integration Engineer will lead process development for superconducting IC fabrication, optimize production processes, and enhance reliability in collaboration with foundries.

Design and develop high-speed digital hardware and FPGA-based image acquisition, processing, and control for SWIR cameras. Implement Verilog/VHDL FPGA code, validate DDR3/DDR4 and SERDES interfaces, develop embedded hardware and C/C++ software, integrate ADC/DAC and sensor interfaces, perform board bring-up, debugging, PCB/schematic support, and collaborate across disciplines to deliver production-ready imaging systems.

Owner of micro-architecture and RTL lifecycle for complex digital blocks. Implement RTL in SystemVerilog/Verilog, drive control logic and IP integration, support sign-off (CDC, RDC, lint, synthesis), collaborate with DV teams for closure and debug, and take full project ownership with minimal supervision.

Lead RTL verification for RAIN RFID reader ICs across product lifecycle. Develop verification methodologies, SystemVerilog/UVM testbenches, BFMs, assertions, coverage metrics, CI/CD automation, and constrained-random tests. Collaborate with digital, analog, and silicon teams to ensure tape-out quality and support post-silicon validation and product improvements.