Top Remote Senior Level Hardware Engineer Jobs in CO

Lead the design and development of consumer products, mentor junior engineers, and collaborate with cross-functional teams to innovate and test new solutions.

The Senior Mechanical Engineer will design mechanical systems for data centers, ensuring reliability, efficiency, and scalability while collaborating with various teams.

The engineer will define and implement ASIC package architecture, focusing on FC-BGA and MCM solutions, collaborating on package design and ensuring successful production of high-performance ASICs.

The role involves leading ASIC package design for FC-BGA and MCM solutions, ensuring high-performance mixed-signal/digital SoCs succeed from architecture to production. Responsibilities include trade studies, design standards, and vendor collaboration.

Develop and introduce new photonic integrated circuit-based telecommunication products, ensuring system-level performance meets requirements and enhancing product quality through collaboration and analysis.

Design and analyze high-speed analog/mixed-signal circuits, create layouts, develop testing plans, and support design methodologies for telecom networks.

The Staff Mechanical Engineer leads mechanical design for C&I projects, focusing on enclosure design, layout modeling, and troubleshooting, ensuring compliance and technical governance.

The Staff Mechanical Engineer leads mechanical design and standards in power projects, overseeing designs, troubleshooting, and ensuring compliance with engineering standards.

Responsible for semiconductor technology component engineering for CommIC products, managing design-in, testing, manufacturing, and quality, while interfacing with suppliers and internal teams to resolve issues.

Lead mechanical engineering design on data center projects, focusing on HVAC and mechanical systems. Prepare drawings and documentation, ensuring project compliance and efficiency.

The Senior Solution Delivery Architect is responsible for configuring and supporting mainframe hardware, managing migrations, and leading hardware upgrades for clients.

Design and implement SystemVerilog RTL for high-speed ASIC compute, memory, and networking subsystems. Define microarchitecture, optimize Power/Performance/Area, collaborate with verification/physical teams, prototype features with architects/software, mentor junior engineers, and improve design flow using AI and automation.