Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a highly experienced Senior Analog/Mixed-Signal Architect to define and lead the development of advanced die-to-die interconnect circuits for our next-generation AI silicon. In this pivotal role, you’ll architect high-speed analog/mixed-signal solutions, drive adoption of cutting-edge standards such as UCIe and BoW, and shape our technology roadmap for chiplet-based products.
This role is hybrid, based out of Santa Clara, CA.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- An experienced architect with a proven track record in analog/mixed-signal IC design, especially for high-speed, high-volume applications.
- Deeply knowledgeable about die-to-die interconnect standards and PHYs (including UCIe and BoW), SerDes architectures, signal and power integrity.
- Adept at technical leadership—mentoring both junior and senior engineers and fostering a culture of innovation.
- Comfortable collaborating across digital, packaging, and system teams to deliver highly integrated, multi-die solutions.
What We Need
- 10+ years of experience architecting and implementing analog/mixed-signal circuits, with hands-on expertise in die-to-die PHYs.
- Mastery of high-speed interface design (e.g., SerDes, NRZ, PAM4), clocking (PLLs, DLLs), and advanced PI/SI analysis.
- Proficiency in EDA tools for analog/mixed-signal design, simulation, and layout (e.g., Cadence Virtuoso, Spectre, SPICE).
- Strong communication skills and the ability to drive architectural definition, feasibility analysis, and cross-discipline integration.
What You Will Learn
- How to architect next-generation, chiplet-based die-to-die interconnects and advanced packaging solutions at the cutting edge of the industry.
- Best practices for integrating analog/mixed-signal designs into complex, multi-die AI/ML accelerators.
- Methods for guiding technology roadmaps and evaluating third-party IP versus internal development.
- Strategies for hands-on silicon bring-up, debugging, and closing challenging signal/power integrity requirements.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
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