Broadcom Logo

Broadcom

Design Verification Engineer

Posted One Month Ago
Be an Early Applicant
In-Office
2 Locations
144K-230K Annually
Expert/Leader
In-Office
2 Locations
144K-230K Annually
Expert/Leader
Develop and execute verification plans and environments for complex digital and mixed-signal IP. Create UVM testbenches, random and directed tests, assertions, functional models; perform coverage closure, debug RTL and gate-level failures, and collaborate with design teams and EDA vendors. May work with emulation and FPGA prototyping and adopt advanced verification flows.
The summary above was generated by AI

Please Note:

1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)

2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

Design Verification Engineer

Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer that will be responsible for modeling and verification activities related to complex digital and mixed signal (MXS) IP blocks used in Broadcom’s ASIC developments.

The engineer will be responsible for defining verification plans and environment architecture, developing test cases and test bench components, coverage analysis and closure, and debug. This position may involve working with emulation and FPGA prototyping platforms and leading efforts in evaluating and driving the adoption of advanced verification methodologies/flows. The engineer will be expected to develop functional models to facilitate the block, system, and ASIC level verification. The candidate must work closely with the design teams and EDA vendors to accomplish the modeling and verification tasks.

The candidate must have experience using SystemVerilog and UVM, designing verification components including UVM agents, checkers, and behavioral models. Experience with implementing and achieving coverage goals by developing random & directed test cases, and SystemVerilog Assertions. This engineer will be responsible for analyzing and debugging simulation failures at the RTL and gate-level. The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing such formats in the verification context.

Requirements:

  • 12+ years of experience with verification concepts and architectures for complex digital and MXS circuits

  • Experience verifying designs at the block and system levels.

  • Experience with complex digital and mixed-signal circuits (PLL, DLL, ADC, DAC)

  • Experience debugging RTL and gate-level netlists, analyzing schematic diagrams of analog / MXS circuits

  • Experience using SystemVerilog and advanced verification concepts and methodologies (UVM, SVA)

  • Experience with Synopsys, Cadence, and Mentor simulations tools

  • Demonstrated ability to plan and deploy complex, reusable, and scalable verification environments

  • Experience with Perl/Python and Tcl or other scripting languages

  • Experience with version control systems (DesignSync, git)

  • Superior writing, grammar, and verbal communication skills

  • Excellent problem solver; develops and employs automated processes where applicable

  • Worked independently and in a global team and dynamic environment in a highly visible role

  • Possesses ability to learn and adapt to new tools and methodologies on the fly

  • Must have legal authorization to work in the US

It is a plus if the candidate has expertise in one or more of the following areas:

  • Experience with hardware design and debug

  • Experience with emulation (Palladium, Veloce, Zebu) and FPGA (Xilinx) platforms

  • Formal verification concepts / experience is a plus

  • Experience with verifying iJTAG network using ICL and PDL in the Tessent tool a plus

  • Experience with co-simulation a plus

Education and Experience required:

  • BS in Electrical Engineering / Computer Engineering and 12+ years of related experience; or an MS in Electrical Engineering / Computer Engineering and 10+ years of related experience.


Compensation and Benefits


The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Broadcom Broomfield, Colorado, USA Office

Broomfield, United States

Broadcom Fort Collins, Colorado, USA Office

Fort Collins, United States

Similar Jobs

28 Days Ago
Hybrid
97K-165K Annually
Senior level
97K-165K Annually
Senior level
Aerospace • Hardware • Information Technology • Security • Software • Cybersecurity • Defense
Develop and use SystemVerilog/UVM or VHDL verification environments for FPGA and ASIC systems supporting electronic warfare applications. Create constrained-random, self-checking testbenches, test plans, verification IP, and coverage-driven test strategies. Analyze metrics, improve test effectiveness, contribute to verification methodologies, collaborate with distributed engineering teams, and execute multiple projects to schedule. The role is full-time onsite.
Top Skills: AsicCadenceFpgaMentor QuestaOvmSystemverilogUvmVhdl
Yesterday
In-Office
122K-195K Annually
Senior level
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
Develop and maintain ASIC and SoC design verification environments using SystemVerilog and UVM. Design verification components, behavioral models, assertions, coverage, and randomized or directed tests. Debug simulation failures, analyze coverage, verify designs at block and system levels, and collaborate with design and verification teams. The role also involves applying ASIC verification methodologies, resolving complex technical tradeoffs, and supporting emulation or FPGA prototyping when needed.
Top Skills: AsicCC++EmulatorsFpgaOvmPerlRtlSocSystemcSystemverilogUvm
2 Days Ago
In-Office
102K-219K Annually
Junior
102K-219K Annually
Junior
Software • Quantum Computing • Metaverse • Infrastructure as a Service (IaaS)
Develop C/C++ firmware-style tests, low-level drivers, Python tooling, and FPGA prototypes for subsystem and SoC verification. Own FPGA platform stability, debug hardware and post-silicon issues, and lead silicon bring-up and validation. Analyze scan dumps, troubleshoot boot, JTAG, UART, and connectivity failures, perform root-cause analysis, and coordinate fixes across design, firmware, hardware, architecture, and security teams.
Top Skills: AhbAmbaApbAxiCC++Embedded ProcessorsFpgaHapsI2CI3CJtagLogic AnalyzersMakefilesMultimetersOscilloscopesPerlPythonRubySpiSystemverilogUartUsbXilinx

What you need to know about the Colorado Tech Scene

With a business-friendly climate and research universities like CU Boulder and Colorado State, Colorado has made a name for itself as a startup ecosystem. The state boasts a skilled workforce and high quality of life thanks to its affordable housing, vibrant cultural scene and unparalleled opportunities for outdoor recreation. Colorado is also home to the National Renewable Energy Laboratory, helping cement its status as a hub for renewable energy innovation.

Key Facts About Colorado Tech

  • Number of Tech Workers: 260,000; 8.5% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Lockheed Martin, Century Link, Comcast, BAE Systems, Level 3
  • Key Industries: Software, artificial intelligence, aerospace, e-commerce, fintech, healthtech
  • Funding Landscape: $4.9 billion in VC funding in 2024 (Pitchbook)
  • Notable Investors: Access Venture Partners, Ridgeline Ventures, Techstars, Blackhorn Ventures
  • Research Centers and Universities: Colorado School of Mines, University of Colorado Boulder, University of Denver, Colorado State University, Mesa Laboratory, Space Science Institute, National Center for Atmospheric Research, National Renewable Energy Laboratory, Gottlieb Institute

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account