Jobs at Broadcom

The Equipment Engineer will support metrology equipment in semiconductor manufacturing through maintenance, troubleshooting, and optimization while collaborating with cross-functional teams.

As a Technical Adoption Manager, you will support customers in leveraging VMware technologies to achieve their multi-cloud objectives. Responsibilities include creating success plans, guiding technical adoption, optimizing operations, and presenting insights to ensure customer satisfaction and drive business value.

The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.

Design and optimize mechanical aspects of ASIC packages using FEA. Collaborate with teams, conduct validations, and document designs across multiple projects.

As an Electrical Hardware & AI Integration Engineer, you'll bridge IT and Design Engineering, validate hardware, implement AI tools, and design mixed-signal hardware.

The VCF Support Account Manager enhances customer support by managing support requests, collaborating with teams, and optimizing client experiences. Responsibilities include leading meetings, overseeing escalations, and ensuring proper resolutions for customer issues.

Develop and maintain DFT design automation tools and methodologies for ASIC SoCs. Automate flows with scripting, build complex C++ tools, debug tool/flow issues, support engineers globally, work with EDA vendors, document and train on custom flows, and deploy DFT architecture solutions.

Develop detailed layout and perform verification for high-speed analog/mixed-signal IPs (PLLs, SerDes, HBM, UCIe, DACs/ADCs, DFEs, serializers). Optimize layouts for power, performance, and SOC integration using Cadence Virtuoso (Innovus a plus) in advanced 3nm/2nm FinFET processes.

Lead SoC architecture and IP integration for AI and storage chips. Drive design quality via simulation, synthesis, formal verification, and timing/physical optimization. Collaborate cross-functionally, consult layout/DFT, and produce SoC release collateral and specifications.

Lead and manage customer ASIC programs end-to-end, advise on EDA flows and design best practices, execute physical design checks, assess and mitigate risks, collaborate with cross-functional teams, and support tape-out, bring-up, and production for advanced-node chips.

Lead and manage external customer ASIC programs end-to-end, advise on EDA flows and best practices, perform physical design and STA checks, identify and mitigate design risks, coordinate cross-functional teams (test, packaging, fabrication, bring-up), and communicate technical findings to management and business teams.

Lead customer ASIC programs end-to-end—from RFQ through tape-out and production—guiding physical design, STA, test, packaging and EDA flows. Advise customers, execute physical-design checks, assess and mitigate risks, collaborate cross-functionally, and publish best-practice guidance.

The Supply Chain Planning Analyst will support planning efforts, manage ERP issues, forecast production, and drive improvements in manufacturing processes at Broadcom.

Architect and validate VMware Cloud Foundation deployments and private cloud SDDC designs. Integrate physical underlay networks (e.g., Cisco ACI) with VMware NSX overlays, design Kubernetes networking and ingress/egress, and architect enterprise load balancing (AVI, F5, Netscaler). Lead workshops, proofs-of-concept, collaborate with field teams and SIs, create reusable reference architectures, and provide product feedback to engineering.

Integrate and maintain commercial AI tools and LLM agents into VLSI design flows, coordinate multi-agent systems, optimize performance and QoR, deploy AI agents and chatbots, preprocess data, evaluate solutions, and train end-users to improve design productivity.

Lead constrained-random verification of high-throughput Ethernet ASICs for AI/ML acceleration using SystemVerilog/UVM testbenches, drive coverage closure, run simulations with VCS/Incisive, script automation, collaborate with global design and architecture teams, and provide technical leadership.

Perform static timing analysis and timing closure for high-performance SoC ASICs. Debug constraints with design teams, create timing ECOs, implement timing infrastructure, develop/maintain analysis scripts, and document timing methodologies to ensure tapeout-ready timing signoff.

Design critical IPs for analog systems, including opamps and ADCs; perform simulations and characterize IC performance; lead projects for mixed-signal designs.

Identify, analyze, and minimize defectivity in FBAR filter fabrication using inline inspection and physical analysis (SEM/TEM/AFM/FIB). Lead root-cause investigations, define visual control plans, author OCAPs, drive containment and disposition actions, and partner across fab, PAL, and backend teams to improve yield and reliability. Mentor staff and lead cross-functional task forces to resolve complex defect trends.

The Fab Manufacturing Quality Engineer will enhance quality systems in semiconductor manufacturing, lead meetings, and develop data mining tools while managing quality processes and improvement initiatives across teams.