Cisco Logo

Cisco

ASIC Physical Design Engineer

Reposted 4 Hours Ago
Be an Early Applicant
Remote
Hiring Remotely in Armenia
Senior level
Remote
Hiring Remotely in Armenia
Senior level
Lead macro-level RTL-to-GDSII physical implementation and signoff for complex SoC/block designs. Perform synthesis, floorplanning, placement, CTS, routing, STA, physical verification (LVS/DRC), formal checks, and signoff. Optimize power, performance, and area while resolving EM and IR-drop issues. Collaborate with Front-End teams and use EDA toolchains to achieve timing closure and reliable silicon.
The summary above was generated by AI
This is a hybrid role with four days per week at Cisco’s Yerevan office.
Meet the Team

Our team specializes in macro-level RTL-to-GDSII physical implementation and signoff, collaborating closely with Front-End teams to ensure optimal results. We are dedicated to delivering complex SoC and block-level projects through technical excellence and teamwork. The team is composed of highly experienced professionals who value collaboration and high standards in physical design.

Your Impact

Lead macro-level RTL-to-GDSII physical implementation and signoff. Collaborate with Front-End teams to translate architecture into optimal physical design. Perform synthesis, floorplanning, placement, Clock Tree Synthesis (CTS), and routing. Optimize power, performance, and area (PPA) while maintaining design correctness through formal verification. Execute static timing analysis (STA), physical verification, formal checks, and signoff closure to ensure reliable, high-quality silicon. Analyze and resolve Electromigration (EM) and IR-drop issues to meet reliability and performance signoff targets.

Minimum Qualifications
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.

  • 5+ years of hands-on experience in ASIC design and physical implementation.

  • Proven track record in ASIC physical design and verification preferably in complex SoC or block-level projects.

  • Deep knowledge of block-level synthesis, place-and-route (PnR), and timing closure.

  • Experience with industry-standard PnR and signoff tools (e.g., Synopsys, Cadence).

Preferred Qualifications
  • Broad understanding of physical design methodologies, integration, and implementation flows.

  • Experience in physical verification (LVS, DRC) and signoff processes.

  • Familiarity with physical design EDA toolchains and end-to-end workflows.

  • Advanced expertise in STA, timing closure, and constraint management.

  • Proficiency in scripting (Tcl, Python, or Perl) for automation and productivity improvements.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Similar Jobs

4 Hours Ago
Remote
Mid level
Mid level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Perform full-chip physical implementation from RTL to GDSII: synthesis, floorplanning, placement, CTS, routing, STA, physical verification and signoff. Optimize PPA, resolve EM/IR issues, collaborate with Front-End teams, and drive design closure and reliability.
Top Skills: CadenceClock Tree Synthesis (Cts)DrcEm AnalysisFloorplanningGate-Level Netlist SynthesisGdsiiIr-Drop AnalysisLvsPerlPlace And Route (Pnr)PlacementPythonRoutingRtlStatic Timing Analysis (Sta)SynopsysTcl
4 Hours Ago
Remote
Senior level
Senior level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Develop, validate, and maintain timing constraints and SDC flows for block, sub-chip, and full-chip test modes. Perform quality checks, SDC validation, timing exception handling, and collaborate with cross-functional teams to resolve timing and design flow issues. Improve methodologies and ensure STA accuracy across design stages.
Top Skills: AtpgBistDftMakefilePerlPrimetimePythonSdcStatic Timing AnalysisSynopsys Fusion CompilerSynopsys GcaSynopsys TcmTclTessent
4 Hours Ago
Remote
Mid level
Mid level
Cloud • Information Technology • Internet of Things • Professional Services • Software
Perform full-chip physical implementation from RTL to GDSII: synthesis, floorplanning, placement, CTS, routing, STA, physical verification and signoff. Optimize PPA, resolve EM/IR issues, collaborate with Front-End teams, and drive design closure and reliability.
Top Skills: CadenceClock Tree Synthesis (Cts)DrcEm AnalysisFloorplanningGate-Level Netlist SynthesisGdsiiIr-Drop AnalysisLvsPerlPlace And Route (Pnr)PlacementPythonRoutingRtlStatic Timing Analysis (Sta)SynopsysTcl

What you need to know about the Colorado Tech Scene

With a business-friendly climate and research universities like CU Boulder and Colorado State, Colorado has made a name for itself as a startup ecosystem. The state boasts a skilled workforce and high quality of life thanks to its affordable housing, vibrant cultural scene and unparalleled opportunities for outdoor recreation. Colorado is also home to the National Renewable Energy Laboratory, helping cement its status as a hub for renewable energy innovation.

Key Facts About Colorado Tech

  • Number of Tech Workers: 260,000; 8.5% of overall workforce (2024 CompTIA survey)
  • Major Tech Employers: Lockheed Martin, Century Link, Comcast, BAE Systems, Level 3
  • Key Industries: Software, artificial intelligence, aerospace, e-commerce, fintech, healthtech
  • Funding Landscape: $4.9 billion in VC funding in 2024 (Pitchbook)
  • Notable Investors: Access Venture Partners, Ridgeline Ventures, Techstars, Blackhorn Ventures
  • Research Centers and Universities: Colorado School of Mines, University of Colorado Boulder, University of Denver, Colorado State University, Mesa Laboratory, Space Science Institute, National Center for Atmospheric Research, National Renewable Energy Laboratory, Gottlieb Institute

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account