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PsiQuantum

Senior Process Design Kit (PDK) LVS Flow engineer

Posted 17 Days Ago
In-Office or Remote
2 Locations
150K-185K Annually
Senior level
In-Office or Remote
2 Locations
150K-185K Annually
Senior level
Develop, validate, and maintain the LVS verification flow within Photonics Process Design Kits, ensuring accuracy in physical implementations of circuits.
The summary above was generated by AI

Quantum computing holds the promise of humanity’s mastery over the natural world, but only if we can build a real quantum computer. PsiQuantum is on a mission to build the first real, useful quantum computers, capable of delivering the world-changing applications that the technology has long promised. We know that means we will need to build a system with roughly 1 million qubits that supports fault tolerant error correction within a scalable architecture, and a data center footprint.

By harnessing the laws of quantum physics, quantum computers can provide exponential performance increases over today’s most powerful supercomputers, offering the potential for extraordinary advances across a broad range of industries including climate, energy, healthcare, pharmaceuticals, finance, agriculture, transportation, materials design, and many more.

PsiQuantum has determined the fastest path to delivering a useful quantum computer, years earlier than the rest of the industry. Our architecture is based on silicon photonics which gives us the ability to produce our components at Tier-1 semiconductor fabs such as GlobalFoundries where we leverage high-volume semiconductor manufacturing processes, the same processes that are already producing billions of chips for telecom and consumer electronics applications. We also benefit from the quantum mechanics reality that photons don’t feel heat or electromagnetic interference, allowing us to take advantage of existing cryogenic cooling systems and industry standard fiber connectivity.

In 2024, PsiQuantum announced two government-funded projects to support the build-out of our first Quantum Data Centers and utility-scale quantum computers in Brisbane, Australia and Chicago, Illinois. Both projects are backed by nations that understand quantum computing’s potential impact and the need to scale this technology to unlock that potential. And we won’t just be building the hardware, but also the fault tolerant quantum applications that will provide industry-transforming results.

Quantum computing is not just an evolution of the decades-old advancement in compute power. It provides the key to mastering our future, not merely discovering it. The potential is enormous, and we have the plan to make it real. Come join us.

There’s much more work to be done and we are looking for exceptional talent to join us on this extraordinary journey!

Job Summary:

We are actively seeking an experienced PDK LVS Flow engineer. In this pivotal role, you will be responsible for developing, validating, and maintaining the Layout Versus Schematic (LVS) verification flow within our Photonics Process Design Kits.

Your expertise in netlist extraction, comparison, and manipulation is essential to ensuring a robust design flow, leading to accurate and efficient physical implementations of our leading-edge Photonics circuits.

You utilize your coding skills to establish an LVS verification flow within our design environment. You leverage collaborative version control systems, preferably Git, to maintain the high-quality and integrity of our PDKs.

You support the design and layout teams for LVS-related issues, especially during the tape-out phase.

Responsibilities:

  • Establish and maintain a robust LVS verification flow using Klayout and Python.
  • Define, implement, and validate netlist extraction rules from our Photonics circuits within the PDK, ensuring precise device and connectivity recognition.
  • Develop robust tools for comprehensive netlist manipulation, comparison, and verification to ensure alignment between layout and schematic netlists.
  • Maintain, validate, and release new versions of our PDKs, ensuring accuracy and performance.
  • Provide support and assistance to layout and design teams throughout the tape-out phase.
  • Drive essential interactions among our foundry, process, circuit design, layout, and test teams to ensure seamless implementation of our advanced photonics circuits.

Experience/Qualifications:

  • Advanced degree in Computer Science, Electrical Engineering, or a related field.
  • Minimum of 5 years’ experience in a similar role, with strong focus on LVS.
  • Experience with Silicon Photonics design, particularly with complex circuits.
  • Proficiency in Python coding and scripting languages, with a focus on robust, clear, modular and testable code practices.
  • Required knowledge of KLayout; experience with gdsfactory preferred.
  • Demonstrated interest in quantum computing.
  • Highly focused, self-motivated, and detail-oriented.
  • Proven team player with the ability to work effectively across departments, sites, and time zones.
  • Excellent verbal and written communication skills.

PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws.

Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to [email protected].

We are not accepting unsolicited resumes from employment agencies.

The ranges below reflect the target ranges for a new hire base salary. One is for the Bay Area (within 50 miles of HQ, Palo Alto), the second one (if applicable) is for elsewhere in the US (beyond 50 miles of HQ, Palo Alto). If there is only one range, it is for the specific location of where the position will be located. Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs. Base pay is only one part of the total compensation package. Full time roles are eligible for equity and benefits. Base pay is subject to change and may be modified in the future.

U.S. Base Pay Range
$150,000$185,000 USD
Bay Area Pay Range
$170,000$202,000 USD

Top Skills

Gdsii
Klayout
Python

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