Senior FPGA Engineer

Company Overview

Red 6 is an innovative Augmented Reality (AR) technology startup leading the way in synthetic air combat training. Our primary technology, supporting our ATARS product, enables pilots to simulate the cognitive challenges of flying while accessing realistic, scalable training in dynamic outdoor environments.

Job Summary
We are looking for a Senior FPGA Engineer to take ownership of advanced FPGA design and verification tasks within our AR training systems. In this role, you will work with a high degree of independence on challenging design problems, collaborate closely with cross-functional teams, and help guide less experienced engineers through technical hurdles.

The Senior FPGA Engineer will bridge the gap between hands-on development and technical leadership, ensuring designs meet performance goals, integration requirements, and quality standards.

Key Responsibilities

• Design and implement complex FPGA modules and subsystems in Verilog or VHDL for the ATARS product line.

• Perform simulation, verification, and debugging at both block and system level.

• Handle synthesis, place-and-route, and timing closure for performance-critical designs.

• Collaborate with embedded software, systems, and electrical teams to define FPGA interfaces, requirements, and integration strategies.

• Optimize FPGA designs for performance, resource utilization, and power efficiency.

• Document designs, specifications, and verification reports for internal and customer use.

• Provide mentorship and code reviews for junior engineers.

• Contribute to FPGA design process improvements and development best practices.

Experience, Skills, and Required Qualifications

• Education: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field (Master’s degree preferred).

• Experience: 6–8 years of FPGA design and development experience, with proven contributions to successful product launches.

• Languages: Proficiency in Verilog, VHDL, and SystemVerilog; scripting skills (Python, TCL); familiarity with C/C++ for hardware/software interaction.

• Tools: Solid experience with Xilinx/AMD FPGA development tools (Vivado, Vitis), simulation tools, and version control systems.

• Protocols: Knowledge of high-speed serial interfaces, PCIe, Ethernet, UART, SPI, I2C, QSPI, and memory interfaces (DDR).

• System Skills: Capability to estimate FPGA resource usage and power requirements during planning.

• Strong problem-solving skills, with the ability to work independently on complex design challenges.

• Ability to obtain a U.S. security clearance (U.S. citizenship required).

Preferred but not Required:

• Experience in aerospace, AR/VR, or defense-related FPGA systems.

• Familiarity with formal verification or UVM-based verification.

Full-Time Employee Benefits

• Healthcare, Dental, and Vision (100% coverage for Employees)

• Paid time off, including vacation, sick, paid holidays, and parental leave

• Short and Long-Term Disability

• Flexible Spending Account (FSA)

• 401(k) Retirement Plan

• Voluntary Worksite Benefits (Accident, Critical Illness, and Hospital Indemnity)
  

Note

Red 6 reserves the right to change its current benefits program at any time, in a manner that is consistent with applicable federal and state regulations.

This job description is not a contract and confers no contractual rights, privileges, or benefits on any applicant or potential applicant. Red 6 has the right to change any and all terms of this job description, including, but not limited to, job responsibilities, qualifications, and benefits. Nothing in this job description constitutes an offer or guarantee of employment.

Red Six Aerospace, Inc, is an Equal Opportunity Employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability status, protected veteran status, or any other characteristic protected by law.

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Compensation Range: $140K - $170K