Jobs at Tenstorrent Inc.

The SoC Physical Design Verification Engineer leads full-chip signoff, ensuring high-quality silicon through physical verification and debugging across teams for successful tapeouts.

The STA Methodology Engineer will lead the optimization of timing methodologies and automation, collaborating across teams to address advanced-node design challenges.

The Staff Technical Program Manager will lead semiconductor physical design projects, managing complex schedules and facilitating communication between teams and clients within AI/ML and CPU initiatives.

Drive top-level implementation of complex AI and CPU SoC designs, ensuring design closure and optimizing chip-level implementations for power, performance, and area.

The Timing Engineer will perform static timing analysis, optimizing paths and constraints to ensure chip performance while collaborating with various engineering teams.

Lead EM and IR-drop simulations ensuring robust power delivery and signal integrity for high-performance ICs. Collaborate with teams on power grid strategies and support EMIR sign-off across chip hierarchy.

Physical Design Engineers at Tenstorrent are responsible for implementing high-performance AI SoC designs, overseeing the complete implementation flow from synthesis to tapeout and collaborating with cross-functional teams to ensure all design aspects are met.

Responsible for physical design of high-performance CPUs and AI/ML architectures, including implementation from synthesis to tapeout, and collaborating with front-end teams.

The AI Subsystems Physical Design Lead is responsible for timing for subsystems in an AI chip, collaborating with RTL designers, and involved in synthesis, place and route, timing analysis, and power optimization.

As a Full-Chip Physical Design Verification Engineer, you will ensure manufacturable silicon by driving full-chip signoff, leading physical verification closure, and collaborating with various teams to achieve successful tapeouts.

The Physical Design Engineer will implement high-performance blocks for CPUs and AI/ML architectures, overseeing the entire flow from synthesis to tapeout and collaborating closely with teams to optimize performance, power, and area.

The Physical Design Engineer will lead efforts in solving physical design challenges, improve RTL-to-GDS methodologies, and integrate AI/ML solutions into CAD flows, focusing on performance and runtime improvements.

As a Chip Design Lead at Tenstorrent, you will oversee the development of SoC programs from architecture to deployment, ensuring collaboration across teams and managing chip lifecycle processes.

Design and specify next-generation CPU networking for datacenter and automotive/robotics targets. Work at the intersection of NoC, performance modeling, and RTL to guide architecture, collaborate with hardware, software, and systems teams, and contribute to datacenter networking and early-stage automotive/robotics networking scoping and specifications.

The CPU Core Unit Lead will develop next-generation CPU RTL, define microarchitecture specifications, oversee design quality, mentor junior engineers, and use AI tools to enhance design processes.

As Director, Systems & Solutions, lead the deployment and optimization of AI compute systems, focusing on hardware technologies and customer engagement to enhance performance and usability.

As an AI Performance Simulation Architect, you will architect and develop scalable cycle-accurate models for AI workloads and guide hardware design optimization.

The Senior Tax Manager leads Tenstorrent's tax function, managing compliance, audits, tax filings, and strategic tax planning while enhancing financial processes.

Lead and grow a software engineering team focused on RISC-V software ecosystem, collaborating with teams to establish RISC-V as the standard.

The Performance Architect will work on high-performance systems with expertise in software and hardware, focusing on AI and HPC solutions.