Jobs at Intel

Design and execute verification plans for mixed-signal IP using OVM/UVM and SystemVerilog/Verilog. Build testbenches and analog behavioral models, run system-level simulations, debug presilicon issues, collaborate with architects/RTL/physical design teams, and document verification results while contributing to reusable verification infrastructure.

Design and validate mixed-signal SoC and FPGA control electronics for qubit systems. Architect control signal chains, perform signal integrity and EM modeling, collaborate with qubit and software teams, and prototype, tape-out, and test RF/analog components to scale qubit control.

Lead architecture strategy for multi-die chiplet SoC platforms: define chiplet partitioning, D2D interconnect and QoS, power/clock/boot infrastructure, RAS/debug/telemetry, and system-level PPA/cost/yield trade studies. Drive cross-functional alignment and produce executive architecture recommendations for scalable data-center networking SoCs.

Lead end-to-end architecture of SoC compute complexes and high-performance memory subsystems for IPU/DPU platforms. Define CPU cluster designs, cache hierarchies, coherency models, DDR/HBM memory controllers, SMMU/IOMMU virtualization, and system-level integration with networking, storage, and accelerators. Optimize performance, power, scalability, and multi-generation roadmaps while collaborating across firmware, drivers, validation, and performance teams.