Jobs at CesiumAstro

Designs, verifies, tests, validates, and deploys FPGA circuits and systems at the HDL level for aerospace and space communications platforms. Responsibilities include high-speed serial interfaces, digital processing cores, clock-domain management, and board-level integration. The engineer presents design reviews, supports proposals, and collaborates with customers and executives. Experience with FPGA tools, laboratory instruments, aerospace qualification, reliability analysis, communications systems, and digital signal processing is valuable.

Develop and integrate embedded Linux software, device drivers, libraries, kernels, bootloaders, and Yocto-based distributions. Support the full software lifecycle, including architecture, implementation, testing, qualification, deployment, and in-orbit support. Collaborate with hardware, systems, FPGA, and firmware engineers on embedded platforms, system bring-up, and integration. Participate in design reviews and technical documentation.

Leads FPGA architecture, design, verification, implementation, testing, and deployment for space-based systems. Defines architectures and interfaces with multidisciplinary teams, optimizes FPGA utilization and power, supports design reviews and proposals, and mentors junior engineers. The role requires expertise in HDL development, synthesis, place-and-route, timing closure, radiation-tolerant devices, high-speed interfaces, laboratory validation, and space-environment mitigation techniques.

Develop and verify FPGA circuits and systems at the HDL level for satellite, aerospace, UAV, and launch vehicle platforms. Responsibilities include designing high-speed serial interfaces, digital processing cores, clock domains, and management interfaces, along with testing, validation, and deployment. The role also involves laboratory testing and collaboration across development phases. Aerospace qualification, reliability analysis, board-level hardware design, and communications or digital signal processing experience are preferred.

Develop and integrate embedded Linux software, device drivers, libraries, kernels, bootloaders, and customized Yocto-based distributions. Support the full software lifecycle, including architecture, implementation, testing, qualification, deployment, and in-orbit support. Collaborate with hardware, systems, firmware, and FPGA engineers on embedded platforms, system bring-up, and performance. Contribute to design reviews, technical documentation, and proposals.

Develop and integrate embedded Linux software, device drivers, libraries, bootloaders, and customized kernels using Yocto-based build systems. Support board bring-up, software packaging, CI/CD, hardware integration, testing, qualification, and in-orbit support. Collaborate with hardware, FPGA, firmware, and systems engineers throughout the software lifecycle, while contributing to design reviews, technical documentation, and proposals.

Leads systems engineering activities for aerospace communication and phased-array antenna products across the lifecycle. Develops verification and validation strategies, requirements traceability, verification documentation, and test configurations. Supports integration, evaluates test results, resolves discrepancies, participates in technical planning and reviews, mentors junior engineers, and collaborates across multidisciplinary teams from concept through launch and operations.

Create and modify SolidWorks models, drawings, and product documentation supporting mechanical engineering and aerospace hardware development. Prepare accurate drawings with tolerances, dimensions, and instructions; manage CAD data and mechanical structures in SolidWorks PDM; process engineering changes; identify and correct design issues; and ensure compliance with program requirements, organizational processes, and industry standards. The role also supports manufacturing-oriented design activities involving CNC, 3D printing, and mechanical assembly.

Lead verification, debugging, qualification, and validation of FPGA-based hardware for aerospace and space systems. Develop verification plans, reusable UVM environments, testbenches, and review packages; analyze simulation results, timing, engineering risks, failures, and root causes. Provide technical leadership during design reviews, customer meetings, hardware integration, and engineering changes while improving FPGA performance, reliability, quality, and maintainability.

Develop and maintain FPGA and digital design verification infrastructure, including UVMf testbenches, reusable VIP modules, CI and regression testing. Integrate SystemVerilog DPI-C with MATLAB and Python models, support simulation and emulation, evaluate Xilinx TLM and QEMU-RP integrations, collaborate with vendors, and mentor engineers on verification methodologies and process improvements.

Owns space communications products across their lifecycle, translating technical capabilities into accurate product documentation, customer materials, and value propositions. Creates datasheets, user guides, interface control documents, integration documentation, and technical specifications. Partners with engineering, business development, sales, and marketing to maintain consistent product messaging, support customer onboarding, identify documentation gaps, and inform roadmap and product strategy. Requires deep expertise in RF communications, satellite communications, or space systems.

The Senior Quality Engineer leads continuous improvement, Lean and Six Sigma initiatives, root-cause analysis, Kaizen events, value stream mapping, capability studies, quality metrics, employee training, and AS9100/ISO 9001 audits. The role partners with engineering, manufacturing, and management to improve processes, reduce waste, strengthen the quality management system, and drive corrective-action culture in an aerospace or electronics manufacturing environment.

Leads and develops a mechanical engineering team supporting ruggedized phased-array communication systems. Responsibilities include staffing, mentoring, process improvement, resource planning, mechanical architecture, detailed design, structural and thermal analysis, manufacturing, integration, environmental qualification, production transition, proposal support, and cross-functional program execution. The manager remains hands-on as a senior technical contributor for aerospace, defense, and communications hardware.

Lead the end-to-end development of reconfigurable processing units for space and airborne platforms. Responsibilities include architecture, electronics design, multidisciplinary technical leadership, integration, environmental and flight qualification, requirements and verification documentation, production transition, risk mitigation, and customer communication. The role owns technical execution and schedule accountability while coordinating RF, digital, power, mechanical, thermal, software, and systems engineering teams.

Build and modernize full-stack software for space mission systems, including distributed microservices, cloud-native applications, DevSecOps pipelines, automated testing, and mission operator interfaces. Integrate and test ground and flight software through simulation, emulation, and interface validation. Collaborate with space systems and operations teams, provide technical leadership, mentor engineers, and support DoD and intelligence-community programs.

Leads complex satellite mission systems and ground-segment programs from planning through delivery. Oversees cost, schedule, technical, quality, contractual, manufacturing, integration, and customer requirements. Serves as the primary customer interface, leads cross-functional teams, manages risks and resources, communicates performance to executives, and develops program governance, reporting, metrics, and continuous-improvement processes.

Summer interns support the design and development of satellite communication electronics, contributing to schematics, PCB layouts, hardware bring-up, testing, analysis, debugging, and hands-on laboratory work. Projects may involve high-speed digital, power, analog, or RF hardware. Interns collaborate with design engineers, present their work, and gain experience across the full hardware development lifecycle from concept through delivery and in-orbit support.

Supports satellite and constellation mission analysis through orbit design, GNC analysis, mission design, system trades, and subsystem interaction studies. The intern collaborates with aerospace engineers, contributes to spacecraft programs, presents findings to leadership, and uses simulation and scripting tools for project-based space mission assignments.

Supports procurement, inventory management, supply chain recordkeeping, data analysis, reporting, effectiveness tracking, and administrative activities. The intern will help identify trends and improvement opportunities while collaborating with the supply chain team in an onsite aerospace environment.

Summer 2027 FPGA interns will develop HDL-level FPGA systems for satellite communication platforms. Responsibilities include FPGA circuit design, verification, testing, validation, and deployment involving high-speed serial interfaces, digital processing cores, multiple clock domains, and management interfaces. Interns will collaborate with engineers and present their work to peers, mentors, and executives.